CPU Configuration Asus prime Asus M3A78-EH

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Chapter 2: BIOS setup

2.4.3 

CPU Configuration

The items in this menu show the CPU-related information that the BIOS 

automatically detects.

GART Error Reporting [Disabled]

This option should remain disabled for the normal operation. The driver developer 

may enable it for testing purpose. 

Configuration options: [Disabled] [Enabled]

2.4.2 

Hyper Transport Configuration

Select Screen

    Select Item

+-   Change Option

F1   General Help

F10   Save and Exit

ESC   Exit

v02.61 (C)Copyright 1985-2008, American Megatrends, Inc.

CPU Configuration

Module Version: 13.20

AGESA Version: 3.1.4.0

Physical Count: 1

Logical Count: 1

AMD Sempron(tm) Processor 3200+

Revision: F2

Cache L1: 128 KB

Cache L2: 128 KB

Cache L3: N/A

Speed   : 1800MHz

Current FSB Multiplier: 9x

Maximum FSB Multiplier: 9x

Able to change Freq.  : Yes

uCode Patch Level     : 0x62

GART Error Reporting 

 

[Disabled]

Microcode Updation 

 

[Enabled]

Secure Virtual Machine Mode  [Enabled]

Cool ‘n’ Quiet 

 

[Enabled]

This option should 

remain disabled for 

the normal operation. 

The driver developer 

may enable it for 

testing purpose.

BIOS SETUP UTILITY

 

    Advanced

Link Speed [Auto]

Allows you to set the HyperTransport link speed.
Configuration options:[200MHz] [400MHz] [600MHz] [800 MHZ] [1 GHz] [Auto]

Link Width [Auto]

Allows you to set the HyperTransport link width.
Configuration options: [Auto] [4 Bit] [8 Bit] [16 Bit]

Hyper Transport Configuration
NODEO:PCI-X2 HT Link

Link Speed 

[Auto]

Link Width 

[Auto]

The HyperTransport 

link will run at this 

speed if it is slower 

than or equal to the 

system clock and the 

board is capable.